Process Engineer, Gold-To-Gold Interconnect & Flip Chip Assembly (Starlink/Akoustis)

• ◆Develop and qualify GGI and thermosonic flip-chip / die-attach processes, including bond force, temperature, ultrasonic energy, bond time, alignment, parallelism, and tool selection; establish process windows with DOE to control bond integrity, contact resistance, and mechanical strength
• ◆Develop gold stud bump, gold bump, and gold-to-gold interconnect processes and evaluate bond quality and process capability
• ◆Develop and optimize vacuum mold lamination and related encapsulation (material selection, vacuum, temperature, pressure, time, and cure); troubleshoot voiding, delamination, die shift, warpage, incomplete fill, and bleed
• ◆Support related assembly steps as needed: wafer/die handling, placement, plasma/surface cleaning, underfill, reflow, singulation, laser marking, and inspection
• ◆Select and characterize assembly materials (adhesives, mold compounds, substrates, interconnect materials) for impact on bond strength, adhesion, thermal performance, warpage, and reliability
• ◆Specify, evaluate, install, and qualify assembly equipment (flip-chip bonders, thermosonic bonders, vacuum laminators, plasma, and inspection tools) with suppliers
• ◆Run DOEs, capability studies, and SPC on critical parameters; write process specs, work instructions, control plans, FMEAs, and qualification reports
• ◆Drive NPI from prototype through qualification and production release; perform root-cause analysis and support failure analysis (X-ray, SAM, optical, cross-section, SEM)
• ◆Correlate process settings to electrical, mechanical, and reliability results; apply DFM and own schedules, risks, and production readiness for assigned technologies

• ✓Bachelor's degree in chemical engineering, materials science, mechanical engineering, or other engineering discipline
• ✓2+ years of hands-on semiconductor assembly, IC packaging, or electronics manufacturing experience (Internship or extracurricular experience is applicable)

• ✓3+ years of hands-on IC assembly or advanced packaging experience, including direct GGI or similar gold-based interconnect work
• ✓Hands-on thermosonic flip-chip bonding (force, temperature, ultrasonic power, time, alignment, tooling) and gold stud bumping, gold bumps, or gold-to-gold interfaces
• ✓Vacuum mold lamination or advanced encapsulation with mold sheets, thermally conductive or epoxy molding compounds, or underfills
• ✓Understanding of plasma/surface preparation, organic/ceramic/leadframe/wafer-level substrates, warpage, CTE mismatch, thermal-mechanical stress, adhesion, and delamination
• ✓DOE, SPC, Cp/Cpk, root-cause analysis, FMEA, Six Sigma, and control plans
• ✓Inspection and metrology (X-ray, SAM, optical microscopy, profilometry, cross-section) and interconnect characterization (contact resistance, shear/pull, bond integrity)
• ✓Package reliability testing and standards (JEDEC, IPC), plus experience supporting OSATs or contract manufacturers through development, qualification, and ramp
• ✓CAD (AutoCAD) and familiarity with simulation tools (ANSYS, COMSOL, or similar) is a plus; data analysis with JMP, Minitab, MATLAB, or Python is a plus
• ✓Experience qualifying new assembly equipment and tooling and troubleshooting issues directly on the manufacturing floor

• ✓Onsite in Bastrop, TX (not remote or hybrid)
• ✓Up to 20% domestic and international travel for supplier and manufacturing support
• ✓Willingness to work extended hours or weekends to support key milestones
• ✓Ability to work in a semiconductor manufacturing environment, follow safety and cleanroom requirements, and perform light physical tasks (including lifting up to 25 lbs and handling wafers, substrates, packages, tooling, and assembly samples)
• ✓Strong written and verbal communication skills with engineering, manufacturing, suppliers, and management

ITAR

• ✓To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here .

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