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Sr. Process Engineer - Wafer Level Assembly, AI Satellites (Starmind)

SpaceX · Bastrop, TX

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Level
Senior
Team
Process
Degree
Required
Experience asked
5+ years
Industry
Aerospace & defense
Posted
30+ days ago

The role in 30 seconds

A senior process role at SpaceX (aerospace & defense) in Bastrop, TX. Own the full lifecycle of advanced packaging through board assembly process development— including requirements capture, materials selection, prototyping, process optimization, manufacturing, and failure analysis.

They ask for
5+ years · degree required
Tools it names
SPC, FMEA, GD&T, Robotics, Automation, Tooling

Read from the posting. The full description is below.

It asks for 5+ years. If you're close, apply anyway: requirements are a wish list. Talk to someone on the team first.

At a glance

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About the role

Responsibilities

  • ◆Own the full lifecycle of advanced packaging through board assembly process development— including

requirements

capture, materials selection, prototyping, process optimization, manufacturing, and failure analysis.

  • ✓Own the full lifecycle of equipment specification, qualification, and ramp.
  • ✓Build supply chains for die, packages, components, consumable chemicals, and equipment for satellite compute manufacturing. Define incoming acceptance criteria for components and materials.
  • ✓Specify and implement in-process metrology tools for quality control. Integrate simulation tools with experimental data to guide and drive targeted process improvements.
  • ✓Drive end-to-end process R&D programs, from concept through product implementation, to drive cost down, efficiency improvements, and reliability in electronic systems.
  • ✓Work closely with engineers from adjacent disciplines (mechanical, thermal, materials, electrical, software, test engineering, supply chain, silicon design, etc.) to deliver tightly integrated, high-performance hardware
  • ✓Challenge assumptions, question requirements, learn from your mistakes, and approach problems with an open mind
  • ✓Collaborate closely with leadership and stakeholders across all departments—including design, reliability, production, and supply chain to deliver best in class electronics.
  • ✓Manage compliance risks, ensuring safety and environmental compliance with industry standards.
  • ✓Mentor and develop engineers, providing technical guidance and project oversight.

Qualifications

  • ✓Bachelor's degree in chemical engineering, materials science, mechanical engineering, or other engineering discipline.
  • ✓5+ years experience in microelectronics device research or manufacturing.

Preferred skills and experience

  • ✓Experience in hardware, robotics, automation, or manufacturing environments
  • ✓Experience designing tooling, fixtures, or jigs for assembly or test applications
  • ✓Exposure to scripting or data analysis tools (e.g. MATLAB, JMP, or equivalent) for process data analysis or automation
  • ✓Experience working with precision assemblies, robotic systems, or automated pick-and-place equipment
  • ✓Familiarity with manufacturing process development methodologies (e.g., PFMEA, process capability studies, SPC)
  • ✓Exposure to GD&T and tolerance analysis as applied to fixture and tooling design
  • ✓Experience with or interest in production data systems, MES, or manufacturing traceability infrastructure
  • ✓Familiarity with cleanroom or controlled-environment manufacturing practices

Requirements

  • ✓Ability to work extended hours or weekends as needed for mission critical deadlines
  • ✓Some travel may occasionally be required

ITAR

Requirements

  • ✓To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here .

qualifications

and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com .

Show full description ↓

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

Sr. process engineer – wafer level assembly, ai satellites (starmind)

SpaceX is leveraging its experience deploying and operating the world’s largest satellite constellation to develop Starmind, a new constellation of satellites capturing solar energy in space to power low-cost, high-performance AI compute for Earth. Realizing this vision demands highly reliable, high performance electrical compute hardware, solar power systems, thermal radiators, and more. These systems must operate in the extreme environment of space while delivering the connectivity, control, power distribution, and processing needed for orbital AI inference.

The Starmind team designs, builds, and operates the orbital compute fabric of the future. We develop nearly every key piece of technology in house – from the satellites’ flight computers and power systems to the fully custom compute electronics, memory, and networking that form the brain of our on-orbit data centers. As a Sr. Process Engineer on the Starmind team, you’ll have ownership over the entire life-cycle of the hardware that enables advanced on-orbit AI processing and data center workloads. Your work sits at the intersection of process, packaging, materials, and thermal engineering. The Payload team is responsible for the design of industry-leading compute electronics, memory, and networking in order to achieve required domain sizes and processing workloads.

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